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Search Results: 1 - 10 of about 21 for 74HC74
  Thumbnail Part Manufacturer Description Downloads pdf    More Info
1. 74HC74 Philips Semiconductors / NXP Semiconductors Dual D-type flip-flop with set and reset, positive-edge trigger Datasheet
98.98 Kb, 13 Pg.

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2. 74HC7403 Philips Semiconductors / NXP Semiconductors 4-Bit x 64-word FIFO register 3-state Datasheet
164.19 Kb, 28 Pg.

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3. 74HC7403D Philips Semiconductors / NXP Semiconductors 4 Bit x 64 Word FIFO Register, 3-State Datasheet
118.96 Kb, 28 Pg.

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4. 74HC7403D-T Philips Semiconductors / NXP Semiconductors FIFO, 256-Bit Density, 5V Operating Supply, Industrial, DIP Package, Tape and Reel Datasheet
118.86 Kb, 28 Pg.

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5. 74HC7403N Philips Semiconductors / NXP Semiconductors 4 Bit x 64 Word FIFO Register, 3-State Datasheet
118.96 Kb, 28 Pg.

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6. 74HC7404 Philips Semiconductors / NXP Semiconductors 5-Bit x 64-word FIFO register 3-state Datasheet
124.86 Kb, 28 Pg.

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7. 74HC7404D Philips Semiconductors / NXP Semiconductors 5-Bit x 64-word FIFO register 3-state Datasheet
124.86 Kb, 28 Pg.

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8. 74HC7404D Philips Semiconductors / NXP Semiconductors 5-Bit x 64-word FIFO register 3-state Datasheet
1411.29 Kb, 27 Pg.

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9. 74HC7404N Philips Semiconductors / NXP Semiconductors 5-Bit x 64-word FIFO register 3-state Datasheet
124.86 Kb, 28 Pg.

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10. 74HC7404N Philips Semiconductors / NXP Semiconductors 5-Bit x 64-word FIFO register 3-state Datasheet
1411.29 Kb, 27 Pg.

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Contextual Search Results: 1 - 10 of about 316 for 74HC74
  Thumbnail Abstract Text Filesize Pages Downloads pdf    More Info         
1. Abstract: .. 74HC74; 74HCT74 Dual D-type flip-flop with set and reset; positive-edge trigger. 2003 Jul 10 2. Philips Semiconductors Product specification. Dual D-type flip-flop with set and reset; positive .. 113.89 Kb 22 pg. Datasheet

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2. Abstract: .. U4A 74HC74. U4B 74HC74. 1. 1. 3. 2. 6. CLK. D. Q. Q. 5. PRE. 4. 13. 2. 3. 9. 10. 8. U3A 74HC00. U3C 74HC00. 12 13. 11. U3D 74HC00. CLR. 10 .. 153.39 Kb 2 pg. Datasheet

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3. Abstract: .. 4 Connect the other end of the wire soldered to pin 5 of the 74HC125 at U7 to pin 12 of the 74HC74 device at U3, as shown in Figure 2. There is a solder point adjacent and connecting to pin 12 that is convenient .. 230.36 Kb 4 pg. Datasheet

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4. Abstract: .. 74HC74. Dual D Flip Flop with Set and Reset High−Performance Silicon−Gate CMOS. The 74HC74 is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with .. 129.62 Kb 8 pg. Datasheet

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5. Abstract: .. 74HC74. D. 12. CLK. 11. Q. 9. Q. 8. PR. 10. CL. 13. U4A. 74HC240. A1. 2. A2. 4. A3. 6. A4. 8. G. 1. Y1. 18. Y2. 16. Y3. 14. Y4. 12. U1A. 74LS00. 1. 2. 3 .. 74HC74. D. 2. CLK. 3. Q. 5. Q. 6. PR. 4. CL. 1. CLK. *WAIT. *CSD3. *DTACK. Design Document. 2 PCMCIA RELEASE 2.0 .. 35.1 Kb 6 pg. Datasheet

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6. Abstract: .. CD54/74HC74, CD54/74HCT74. Dual D Flip-Flop with Set and Reset Positive-Edge Trigger. [ /Title (CD54H C74, CD74H C74, CD74H CT74) /Subject (Dual D Flip-Flop with Set. January 1998 - Revised May .. 41.15 Kb 8 pg. Datasheet

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7. Abstract: .. U2 1 74HC74 dual flip-flop. U3, U8, U9 3 74HC04 hex inverter. U4, U5 2. Maxim MXL1014CN quad op amps. U6, U7 2 74HC574 octal latch. C8 1 1μF ceramic capacitor. R3 1 470kTM , 5% resistor. Optional Input Buffers .. 201.04 Kb 8 pg. Datasheet

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8. Abstract: .. The 8.867 MHz PCLK of the OV6630 clocks a 74HC74 configured as a /2 divider. The 4.43 MHz output then clocks an LVT16374 to fetch the data transmitted by Y[7:0] and UV[7:0] at the rising edge. The .. 1183.54 Kb 10 pg. Datasheet

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9. Abstract: .. The 74HC08 (U3), 74HC74 (U4), and 74HC04 (U2) buffer the signal to the IBM PC and provide the capability to mask the ALERT interrupts, detect an externally generated start condi-tion, and capture .. 127.29 Kb 8 pg. Datasheet

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10. Abstract: .. U4 1 74HC74 dual D flip-flop. U5 1 +5V, 100mA regulator, LM78L05ACM. U6 1 MAX865EUA (8 μMAX) U7 1 MAX367CWN (18 SO) NONE 1 PC board. SMBus is a trademark of Intel Corp.. Evaluates: MAXSMBus. Two-Wire Interface .. 367.9 Kb 8 pg. Datasheet

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